Introduction :

 74HC161 is a synchronous presettable binary counter with an internal look-head carry.Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP).

The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW.A LOW at the parallel enable input (PE) disables the counting action and causes the data at thedata inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Presettakes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the masterreset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE, CET and CEP(thus providing an asynchronous clear function)

. The look-ahead carry simplifies serial cascadingof the counters. Both CEP and CET must be HIGH to count. The CET input is fed forward to enablethe terminal count output (TC).

The TC output thus enabled will produce a HIGH output pulse of aduration approximately equal to a HIGH output of Q0. This pulse can be used to enable the nextcascaded stage.

Features :

• Logic Type : Binary Counter.
• Input Current : 1 mA.
  
• Supply Voltage: 2V - 6V.
• Asynchronous master reset.
• High Noise Immunity.
• Package type : DIP 16.